[gmx-developers] GROMACS OpenCL on Gallium
Szilárd Páll
pall.szilard at gmail.com
Fri Nov 27 20:50:47 CET 2015
Thanks for getting back! Without CAS we won't get very far, I'm afraid. The
kernels would need to be rewritten to dump forces to global memory and
reduce them later which will likely completely kill performance (and it's a
hassle to do).
> I can see what I can do, but perhaps StreamComputing guys would be the
> ones to ask here because it is their code.
>
I know the code fairly well, but I double-checked to be sure and
(unfortunately) image support never got fixed, see:
http://redmine.gromacs.org/projects/gromacs/repository/revisions/master/entry/src/gromacs/mdlib/nbnxn_ocl/nbnxn_ocl_data_mgmt.cpp#L208
http://redmine.gromacs.org/projects/gromacs/repository/revisions/master/entry/src/gromacs/mdlib/nbnxn_ocl/nbnxn_ocl_data_mgmt.cpp#L423
So image support is definitely not in the way of using radeonsi - and even
if we implement it, keeping a version with simple gmem direct acesses for
the latter parameter lookup and the analytical estimate iso tabulated Ewald
correction (former) will always remain as an option.
Cheers,
--
Szilárd
On Fri, Nov 27, 2015 at 8:35 PM, Vedran Miletić <rivanvx at gmail.com> wrote:
> After a bit of compiling of latest llvm/clang/libclc/mesa, on r600g we
> get as far as:
>
> Running on 1 node with total 2 cores, 2 logical cores, 1 compatible GPU
> Hardware detected on host akari (the node of MPI rank 0):
> CPU info:
> Vendor: AuthenticAMD
> Brand: AMD Athlon(tm) 64 X2 Dual Core Processor 3600+
> SIMD instructions most likely to fit this hardware: SSE2
> SIMD instructions selected at GROMACS compile time: SSE2
> GPU info:
> Number of GPUs detected: 1
> #0: name: AMD CAICOS (DRM 2.43.0, LLVM 3.8.0), vendor: AMD, device
> version: OpenCL 1.1 MESA 11.1.0-devel, stat: compatible
>
> Reading file em.tpr, VERSION 5.1-dev-20150219-7c30fcf-unknown (single
> precision)
> Note: file tpx version 100, software tpx version 106
> Using 1 MPI process
> Using 2 OpenMP threads
>
> 1 compatible GPU is present, with ID 0
> 1 GPU auto-selected for this run.
> Mapping of GPU ID to the 1 PP rank in this node: 0
>
> Selecting kernel for AMD
> LLVM ERROR: Cannot select: 0x1214be0: i32,ch = AtomicCmpSwap<Volatile
> LDST4[%1034(addrspace=1)]> 0x1d514f0, 0x152efe0, 0xfd3b00, 0x12170c0
> 0x152efe0: i32,ch = CopyFromReg 0x1d514f0, Register:i32 %vreg266
> 0x100a750: i32 = Register %vreg266
> 0xfd3b00: i32,ch = CopyFromReg 0x1d514f0, Register:i32 %vreg268
> 0x100b200: i32 = Register %vreg268
> 0x12170c0: i32 = bitcast 0x12228b0
> 0x12228b0: f32 = fadd 0x12145f0, 0xfd1fa0
> 0x12145f0: f32,ch = CopyFromReg 0x1d514f0, Register:f32 %vreg265
> 0x12164e0: f32 = Register %vreg265
> 0xfd1fa0: f32 = bitcast 0xfd3b00
> 0xfd3b00: i32,ch = CopyFromReg 0x1d514f0, Register:i32 %vreg268
> 0x100b200: i32 = Register %vreg268
> In function: nbnxn_kernel_ElecEw_VdwLJ_F_opencl
>
> Tom Stellard said this is due to missing global atomic compare and
> swap on r600, which will be very difficult to implement. So, this is
> as far as we get with older cards. I'm going to try radeonsi next
> week.
>
> Regards,
> Vedran
>
> --
> Vedran Miletić
> http://vedranmileti.ch/
> --
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