[gmx-developers] 4xN kernel using Advanced NEON (VL=128 bits) and double-FP
Guido Giuntoli
guido.giuntoli at huawei.com
Fri Nov 27 11:16:09 CET 2020
Thanks a lot Erik,
In your CI do you run these tests on different architectures comparing the results?
Which parameter do you usually use to compare the solutions?
Do you compare the force/trajectory of each particle?
Cheers, Guido.
From: gromacs.org_gmx-developers-bounces at maillist.sys.kth.se [mailto:gromacs.org_gmx-developers-bounces at maillist.sys.kth.se] On Behalf Of Erik Lindahl
Sent: Thursday, November 26, 2020 11:17 AM
To: gmx-developers at gromacs.org
Subject: Re: [gmx-developers] 4xN kernel using Advanced NEON (VL=128 bits) and double-FP
Hi Guido,
We don't have isolated specific unit tests just for the NxM kernels yet (but it's coming), but if you run "make check" it will be calling the relevant kernels as part of the integration tests.
Cheers,
Erik
On Thu, Nov 26, 2020 at 10:45 AM Guido Giuntoli <guido.giuntoli at huawei.com<mailto:guido.giuntoli at huawei.com>> wrote:
Thanks a lot guys,
I am wondering where can I find this unity test, I want to run it also. Is it merged into the master?
Cheers, Guido.
From: gromacs.org_gmx-developers-bounces at maillist.sys.kth.se<mailto:gromacs.org_gmx-developers-bounces at maillist.sys.kth.se> [mailto:gromacs.org_gmx-developers-bounces at maillist.sys.kth.se<mailto:gromacs.org_gmx-developers-bounces at maillist.sys.kth.se>] On Behalf Of Erik Lindahl
Sent: Thursday, November 26, 2020 10:25 AM
To: gmx-developers at gromacs.org<mailto:gmx-developers at gromacs.org>
Subject: Re: [gmx-developers] 4xN kernel using Advanced NEON (VL=128 bits) and double-FP
... and I ran through all the unit tests (which passed) on double precision ARM as recently as Tuesday ;-)
Cheers,
Erik
On Thu, Nov 26, 2020 at 10:23 AM Berk Hess <hess at kth.se<mailto:hess at kth.se>> wrote:
Hi,
The kernels works fine in double precision with 128-bit SSE on x86.
Cheers,
Berk
On 2020-11-26 09:25, Guido Giuntoli wrote:
Hi,
I am building a minikernel of the 4 x N kernel and testing it in different architectures. Currently I am trying with in an ARMv8 with Advanced NEON using double-FP.
I see that this kernel operates with 4 particles at the time. When I use double-FP I can fill each SIMD unit with 2 FP numbers (128 bits long for Advanced NEON). I checked that that some interactions in this kernel between the 4 particles are not performed: particle 3 and 4 have net force = 0 (in this minikernel). Am I losing something here? Is the kernel prepared to operate in double precision for vector lengths of 128 bits? Is the masking mechanism intended to solve this issue?
Note: when I use single-FP the 4 forces are different from 0 as I expected.
Thanks a lot for the help ;)
Best regards | Mit freundlichen Grüßen
Guido Giuntoli
HUAWEI TECHNOLOGIES Duesseldorf GmbH
Hansaallee 205, 40549 Dusseldorf, Germany, www.huawei.com<http://www.huawei.com/>
Registered Office: Düsseldorf, Register Court Düsseldorf, HRB 56063,
Managing Director: Li Peng, Li Jian, Shi Yanli
Sitz der Gesellschaft: Düsseldorf, Amtsgericht Düsseldorf, HRB 56063,
Geschäftsführer: Li Peng, Li Jian, Shi Yanli
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Erik Lindahl <erik.lindahl at dbb.su.se<mailto:erik.lindahl at dbb.su.se>>
Professor of Biophysics, Dept. Biochemistry & Biophysics, Stockholm University
Science for Life Laboratory, Box 1031, 17121 Solna, Sweden
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Erik Lindahl <erik.lindahl at dbb.su.se<mailto:erik.lindahl at dbb.su.se>>
Professor of Biophysics, Dept. Biochemistry & Biophysics, Stockholm University
Science for Life Laboratory, Box 1031, 17121 Solna, Sweden
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