[gmx-users] Re: latest benchmarks (Itanium/Xeon/Opteron)

[Erik Lindahl]

Hi Anton,

You probably intended to submit this to the users list; gmx-users-admin 
only goes to me :-)

>
> I've browsed & searched through the archives and although I found 
> announcements
> of benchmarks to be done, I didn't (yet?) see the results. I'm 
> particularly
> interested in results for Itanum (in SGI Altex), Xeon and Opteron (in 
> Linux
> boxes), or at least an (estimated) ratio between them.
>

The long answer, as always, is "it depends", but here's the short one:

Opteron:

If you compile in 32-bit mode you can use the current version of the 
SSE & SSE2 loops. I have written loops that work in the 64-bit native 
mode too, but I want AMD to respond about the SSE issues (they are 
working on it) before we encourage people to use SSE instead of 3DNow 
on AMD machines. However, the 64-bit code will NOT be faster in most 
cases - the Opteron executes 32-bit code natively at full speed - all 
we get with 64-bit is some convenience (not having to use 32-bit mode 
in the compiler), and it makes it possible to use even larger systems 
in the future.


Itanium2: (NOT itanium1)

I have assembly loops that achieve 90+ percent of peak CPU 
floating-point performance, but we need to fix a couple of things in 
the neighborsearching before we can ship it. The performance is roughly 
twice that of non-assembly loops compiled with the latest version of 
the intel compiler. This is achieved without using any water or 
water-water loops (hard to explain, has to do with the architecture), 
so it might be *very* fast for non-water systems. Again, due to 
architectural differences these loops will perform very bad on 
Merced/Itanium1.

Cheers,

Erik