[gmx-users] Re: Opteron: compile with 32-bit SSE
lindahl at sbc.su.se
Tue Sep 21 20:14:32 CEST 2004
> In addition to my last question on this, just out of curiousity (the
> functioning of cpus still seems very complicated to me): might the 64
> code for the opteron then be more powerful on really large systems or
> double precision, compared to the 32 bit? Do you maybe know a simple
> that can help understand how this all (register accessing etc) works?
64-bit architectures will allow you to simulate systems where the total
size of the neighborlists is larger than 2Gb, but that will require
some (minor) changes in the neighborsearching. Normal systems aren't
approaching this limit yet.
The only really good references I know of when it comes to register
renaming are the hardware manuals that you can download from Intel and
AMD - the locations change now and then, though, so you'll have to go
to e.g. developer.intel.com and use the search facilities.
As for 32 vs 64 bits it's much easier: the latter have 64-bit integer
registers and can do 64-bit arithmetics in a single cycle. There are
very few applications that need this (Gromacs is for instance entirely
limited by floating-point performance), so the only clear advantage is
that you can allocate more than 2Gb of memory in a process.
The drawback is that all pointers are 64bit. If you do a lot of pointer
manipulation (which is bad, but anyway :-) you will waste twice as much
cache on the pointers. Further, on some architectures like PowerPC you
have to load a 64bit pointer in two steps to maintain backwards
compatibility, and that can reduce performance slightly.
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